The physical layer connects everything in this curriculum. Every RDMA operation described in Chapter 0 travels through fiber. Every PFC pause frame in Chapter 5 is carried by the same transceivers. Every hop count calculated in Chapter 7 corresponds to a real cable run with a real power draw.
You know the optics roadmap: 400G is today's baseline, 800G is the current frontier, 1.6T is the near-term future. Each generation doubles the modulation complexity and the signal engineering challenge.
You understand the signal chain: pluggable module -> demux -> DSP -> SerDes -> ASIC, and why the DSP is the cost and thermal centre of the current architecture.
You know PAM-4: four voltage levels, two bits per symbol, mandatory FEC, and why this made 400G possible while creating the signal quality challenges that drive DSP complexity.
You can select fiber by distance: MMF OM4 for anything under 100m, SMF DR4 for cross-row runs to 500m, SMF FR4 for cross-building runs to 2km.
You know the form factors: DGX H100 uses OSFP. QSFP-DD offers backward compatibility. OSFP-XD is the 1.6T form factor arriving in 2026.
You understand cable selection: passive DAC within a rack, AOC or pluggable SR8 within a row, DR4 for long cross-row runs.
You know connectors: MPO-16 for SR8 dense AI fabric runs, MPO-12 for DR4 longer-reach runs, pre-terminated trunk systems for SuperPOD-scale deployments.
You understand CPO, LPO, and LRO: three strategies for moving DSP out of the pluggable module, with CPO entering AI switch volume production in 2026.
And you understand the thermal reality: a 64-port 800G switch draws roughly 1,500W, nearly a kilowatt of which is in the optics alone. This is why AI clusters drive 80 kW/rack densities and why CPO exists.
When the NCCL log shows a timeout on rail 4, and ibstat shows Err-Disabled on that rail, and ethtool -S eth3 shows the NIC thinks the link is active -- you now know the complete physical layer story behind that single line of diagnostic output. A photon stopped. The question is which one, and why.